Time division switching networks are well known. In general, such networks usually comprise at least one time division switching stage, referred to herein as a time slot interchange (TSI), and at least one space switching stage, referred to herein as a time multiplexed switch (TMS). The TSI may comprise a buffer memory containing storage for each time slot (channel) of an incoming time division multiplexed line. In a system in which time multiplex switching precedes space multiplex switching, information arriving in time slots on the line is stored in the respectively assigned buffer storage locations for the time slots and are unloaded and switched through the space portion of the network in other network time slots in accordance with instructions stored in a control memory.
It has generally been considered that redundancy of at least the space switching stage is required for a time division network to be reliably acceptable. For example, the No. 4 ESS time division switching system, manufactured by Western Electric Co., Inc., incorporates a time-space-time switching network in which the space portion of the network is completely duplicated. Other redundancy schemes that have been used in time division networks include, for example, total network duplication and N+1 redundancy in which one subportion, e.g., a grid may be substituted as a spare for one of a plurality of other subportions.
Obviously, such structural redundancy is expensive and undesirable if other acceptable ways can be found to improve reliability.